In this assignment, you will design a differential amplifier as shown in the schematics below.

Your design should satisfy the required differential gain, input impedance, single-ended common-mode

gain, and the power dissipation specifications provided in Section A below. Then in Sections B and C, you

will simulate your circuit on LTSpice to compare the simulation results with hand calculations.

A. Hand design: Design the bipolar differential amplifier and the current source and bias network

(π
1, π3, πππ π4) above such that:

(i) Differential gain: π΄π β₯ 200 π,

π

(ii) Input differential resistance: π
ππ β₯ 50 πΞ©,

(iii) π΄ππ < 0.1 where π΄ππ is the single-ended common-mode gain, defined as the gain for a common-

mode input signal when the output is measured from one of the outputs with respect to ground, rather

than differentially.

(iv) To maximize battery life, the power consumption of the differential amplifier, πππππ΄πΏ, must be less

than 2 milliwatts.

Design Suggestion for Part A.

1. Derive the expression for π
, ignoring π of Q1 and Q2.). Replace small signal parameters with

ππ π

βDC currentsβ, βresistorsβ, βπ β, βπ½β, βπ β, etc., use specific values (e.g., π = 100 π, π½ = 200,

π‘hπ΄ π΄

etc.), and simplify the expressions. The π
ππ design specification will help determine an upper limit

for the DC collector current of Q1 (and Q2 since πΌπΆ1 = πΌπΆ2).

2. The total power dissipation is π

ππππ΄πΏ

=π +π =9πΓ(πΌ +πΌ ). Here, πΌ is the

ππ·π· πππ ππ·π· πππ ππ·π·

sum of all DC currents leaving the +π

π·π·

and πΌ is the sum of all dc currents entering the βπ .

πππ ππ

Express πΌππ·π· and πΌπππ in terms of the collector currents of Q1 (or Q2), ignoring the current in the

reference current generation branch formed by π
1 and π4. The πππππ΄πΏ design specification will

help determine another upper limit for πΌπΆ1 = πΌπΆ2.

Derive expressions for π΄ and π΄ . When deriving π΄ , include π of Q1 or Q2. When deriving π΄

πππππ ππ

ignore π of Q1 and Q2 but include π of Q3. Replace small signal parameters with βDC currentsβ,

ππ

βresistorsβ, βπ β, βπ½β, βπ β, etc., use specific values (e.g., π = 100 π, π½ = 200, etc.), and

π‘hπ΄ π΄

simplify the expressions. The π΄π and π΄ππ design specifications will respectively provide lower and

upper limits for the product π
πΆ Γ πΌπΆ1.

Consider the forward-active region requirement of Q1 (or Q2). For π = 0 π, find another upper

πΆπ

limit for the product π
πΆ Γ πΌπΆ1.

Pick an πΌπΆ1 satisfying all upper limits for πΌπΆ1 found in steps 1 and 2. Find π
1 based on the value you

pick for πΌπΆ1. Pick an π
πΆ satisfying the upper and lower limits for π
πΆ β πΌπΆ1 found in steps 3 and 4.

Inyoursimulations,usetheBJTmodel2N2222ofNXP,whichhasaSPICEmodelasbelowwithπ andπ½

highlighted:

π΄

B. DC Analysis: In LTSpice do a DC operating point simulation (.op) with both inputs connected to ground

(i.e.,π =0π).DeterminethesimulatedDCvaluesforπΌ ,πΌ ,πΌ ,πΌ ,πΌ ,π ,π ,π ,π .Compare

πΆπ π
1πΆ3πΆ4πΆ1πΆ2 π΅3 πΈ1,2 π1 π2

these results with your hand calculations. Additionally, comment on the matching between πΌπ
1 πππ πΌπΆ3

and comment on the calculated vs. simulated match between πΌπ
1 πππ πΌπΆ3.

C. Transient Analysis: In LTSpice do a transient simulation (.tran) for 100 ms.

For differential small-signal input simulations:

Apply π£ =1ππ π πππ’π ππππππ πππππππ‘100π»π§. [i.e., π£ =+π£ππ =0.5ππsin(2βπβ100π»π§βπ‘)

ππ π ππ1

2

andπ£ππ2 =βπ£ππ =0.5ππsin((2βπβ100π»π§βπ‘)+π)withDCoffset=0V.]

2

π£ =π£ =π£

πππ1 πππ2 ππ

For common-mode small-signal input simulations:

Apply π£ =1ππ π πππ’π ππππππ πππππππ‘100π»π§. [i.e.,

=1ππsin(2βπβ

ππ π

100π»π§ β π‘) with DC offset = 0V.]

1. For the differential small-signal input, what is the expected emitter voltage of Q1 and Q2,

π£π1(= π£π2)? Plot the simulated waveform. What is the simulated value of π£π1(= π£π2)?

2. Plot π£ππ, π£ππ(π£ππ = π£π2 β π£π1), πππ πππ. Note that πππ is the base current of Q1 (πππ = ππ1).

Calculate the simulated π΄π = π£ππ /π£ππ and π
ππ = π£ππ /πππ . Compare the values with your

design targets.

3. If the simulation results do not match the design constraints, revisit your design to achieve

the targets.

4. For the common-mode small-signal input, plot π£ππ and π£πππ . (π£πππ = π£πππ2 =

π£πππ1 π€hππ π‘hπ ππππ’π‘ ππ π ππππππ β ππππ π πππππ)

Report Requirements

A. Your hand calculations for part A must be detailed and sequential. Show every step of the derivations

clearly, and explain how and why you select each parameter, including any approximations made.

B and C. For parts B and C, besides answering the questions and plotting the requested simulation results,

complete the table below. Provide explanations for any discrepancies exceeding 10%.

πΌπ 1 πΌπΆ4 πΌπΆ3

πΌπΆ1 πΌπΆ2

Hand

calculations

Simulated

Percent

discrepancy

Hand

calculations

Simulated

Percent

discrepancy

πππππ΄π
π΄

π΅3 πΈ1,2 π1 π2 π ππ ππ